Designers of next-generation high-performance computer systems face a host of technical challenges. For the past several decades, rising clock frequencies and increased chip integration have fueled the growth of computer performance. Now these trends have slowed: power and complexity constrains further increases in clock frequencies, and economic realities limit the pace of Moore's Law. Coupled data communication provides a way forward, and this book, Coupled Data Communication Techniques for High-Performance and Low-Power Computing, gives a comprehensive overview for such coupled data techniques. Coupled data communication allows chips to communicate—capacitively or inductively—over short distances between chips without solder, and fundamentally shifts the design paradigm from single-chip integration to single-package integration. This book covers the state-of-the-art in the circuits, architectures, and chip packaging for this novel chip-to-chip communication technology and showcases its potential to drive the coming decades of industry growth. Coupled Data Communication Techniques for High-Performance and Low-Power Computing should be of interest to students and designers in circuits and system architecture.

Coupled Data Communication Techniques for High-Performance and Low-Power Computing PDF

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